GIORGI ROBERTO

Presentazione

Roberto Giorgi is an Associate Professor at Dept. of Information Engineering, University of Siena, Italy. 

• He has received the eligibility (Italian National Abilitation) as Full-Professor since 30th March 2018. 

• For one year, he was Research Associate at the University of Alabama in Huntsville, USA. 

• He received his PhD in Computer Engineering and his MS in Electronics Engineering, Summa cum Laude both from University of Pisa, Italy. 

• He coordinated the European Project AXIOM (3.9Meuro cost, 2015-2018, 7 partners), about designing and manufacturing the next generation board for Cyber-Physical Systems. 

• He coordinated the TERAFLUX project (8.5Meuro cost, 2010-2014, 11 partners) in the area of Future and Emerging Technologies for Teradevice Computing. 

• He is member of the HiPEAC Network of Excellence (High Performance Embedded-system Architecture and Compilation) since 2004. 

• He was Deputy Steering Committee in the HiPEAC, Application leader in the ERA project (Embedded Reconfigurable Architectures), participated to SARC (Scalable ARChitectures) and attracted more than 3 Million Euro of Research Funding to the University of Siena in the last decade. 

• He took part in ChARM project, developing software for performance evaluation of ARM-processor based embedded systems with cache memory. 

• He has been IEEE Judge for the IEEE-CSIDC (Computer Society International Design Competition). 

• He led the project ”Bluesign Translator”, which received a 5th worldwide prize by IEEE and top companies, and received the FORUM-P.A. prize by the Italian Ministry of Technological and Scientific Innovation, as absolute winner in the category of “actions for the social integration of disadvantaged people through ICT”. 

• He has been selected by the European Commission as an independent expert for evaluating ICT European Projects. 

• He is co-author of more than 170 scientific papers. 

• His current interests include Computer Architecture themes such as Embedded Systems, Multiprocessors, Memory System Performance, Workload Characterization, High-Performance Computing. 

• He is a Lifetime member of ACM and a Senior Member of the IEEE, IEEE Computer Society

Orari di ricevimento

  • Lunedi' dalle 16:30 alle 18:30
    Luogo: Edificio S. Niccolo', Via Roma n.56 - stanza 110

LUNEDI ore 16:30-18:30 (o https://unisi.webex.com/meet/roberto.giorgi ) o per brevi domande anche via email giorgi@unisi.it (tutti i giorni lavorativi).

Curriculum Vitae

Attività didattica

ANNO ACCADEMICO DI ESPLETAMENTO: 2025/2026

Anno di corso: 3 Laurea triennale (DM 270) INGEGNERIA INFORMATICA E DELL'INFORMAZIONE A.A. 2023/2024
Anno di corso: 1 Corso di Laurea Magistrale ARTIFICIAL INTELLIGENCE AND AUTOMATION ENGINEERING A.A. 2025/2026

ANNO ACCADEMICO DI ESPLETAMENTO: 2024/2025

Anno di corso: 3 Laurea triennale (DM 270) INGEGNERIA INFORMATICA E DELL'INFORMAZIONE A.A. 2022/2023
Anno di corso: 1 Corso di Laurea Magistrale ARTIFICIAL INTELLIGENCE AND AUTOMATION ENGINEERING A.A. 2024/2025

ANNO ACCADEMICO DI ESPLETAMENTO: 2023/2024

Anno di corso: 3 Laurea triennale (DM 270) INGEGNERIA INFORMATICA E DELL'INFORMAZIONE A.A. 2021/2022
Anno di corso: 1 Corso di Laurea Magistrale ARTIFICIAL INTELLIGENCE AND AUTOMATION ENGINEERING A.A. 2023/2024

ANNO ACCADEMICO DI ESPLETAMENTO: 2022/2023

Anno di corso: 3 Laurea triennale (DM 270) INGEGNERIA INFORMATICA E DELL'INFORMAZIONE A.A. 2020/2021
Anno di corso: 1 Corso di Laurea Magistrale ARTIFICIAL INTELLIGENCE AND AUTOMATION ENGINEERING A.A. 2022/2023

ANNO ACCADEMICO DI ESPLETAMENTO: 2021/2022

Anno di corso: 3 Laurea triennale (DM 270) INGEGNERIA INFORMATICA E DELL'INFORMAZIONE A.A. 2019/2020
Anno di corso: 1 Corso di Laurea Magistrale ARTIFICIAL INTELLIGENCE AND AUTOMATION ENGINEERING A.A. 2021/2022

Attività di ricerca

Ultime pubblicazioni:

  • Giorgi, R. (2025). FREESS: An Educational Simulator of a RISC-V-Inspired Superscalar Processor Based on Tomasulo's Algorithm. In Proceedings of the Workshop Computer Architecture Education, WCAE. Association for Computing Machinery, Inc [10.1145/3743646.3750018]. - dettaglio
  • Hozhabr, S.H., Giorgi, R. (2025). Real-time Object Detection on FPGA-based Heterogeneous MPSoCs: A Preliminary Analysis of the Execution Bottlenecks. In 2025 14th Mediterranean Conference on Embedded Computing, MECO 2025 - Proceedings (pp.54-57). New York : IEEE [10.1109/MECO66322.2025.11049171]. - dettaglio
  • Hozhabr, S.H., Giorgi, R. (2025). A Survey on Real-Time Object Detection on FPGAs. IEEE ACCESS, 13, 38195-38238 [10.1109/ACCESS.2025.3544515]. - dettaglio
  • Sahebi, A., Procaccini, M., Giorgi, R. (2025). HashGrid: An optimized architecture for accelerating graph computing on FPGAs. FUTURE GENERATION COMPUTER SYSTEMS, 162, 1-15 [10.1016/j.future.2024.107497]. - dettaglio
  • Giorgi, R. (2024). DF-Threads: A Scalable and Efficient Execution Paradigm for Edge Computing and HPC. In 2nd Special Track on Big Data and High-PerformanceComputing (BigHPC 2024) co-located with the 3rd ItalianConference on Big Data and Data Science (ITADATA 2024) (pp.44-51). CEUR-WS. - dettaglio